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s p p o o d d 8 8 0 0 a a s 8 8 0 0 - - c c h h a a n n n n e e l l s s d d o o t t m m a a t t r r i i x x c c o o l l u u m m n n / / r r o o w w o o l l e e d d d d r r i i v v e e r r jun. 29, 200 1 v e rsion 1.0 sunplus technology co. r e s e r v es t h e righ t t o c h ange t h i s documen t a t i on w i t hout p r ior no t i ce. i n f o rma t i on prov ided by sunplus t echnology co. is beli e v ed t o b e a c curate and reli able. how e v e r , s unplus technology co. ma k e s no w a rrant y f o r a n y erro rs w h ic h may appear in thi s do cum ent. cont act sunplus technology c o . t o obt a in t he lat e st v e rs ion of dev ic e spec if ic ations be f o re plac ing y our or der . no res pons i bil i t y is a ssum e d by sunplus technology co. f o r an y inf r ingement of p a t e n t or other ri ght s o f t h ird p a rties w h ic h may re s u lt fro m it s use. i n addi t ion, sunplus pro duct s are not a u tho r ize d for u s e a s cr iti c al component s in li fe support d e v i ces/ sy stems o r av iation de v i ces/sy stems, w here a ma lfun c tion or failure o f the prod uct may reasonably be ex pected to result i n si gnifican t injury to th e u s e r , w i thout the ex press w r itten approv al of sunplu s .
spod80a table of conte n ts page 1. gener a l des cripti o n ............................................................................................................ .............................................................. 3 2. fe a t u r es ....................................................................................................................... ........................................................................... 3 3. p a c k a g e ........................................................................................................................ ........................................................................... 3 4. block di a g r a m .................................................................................................................. .................................................................... 3 5. sign a l descr i ptions ............................................................................................................ ............................................................... 4 6. func tion a l d escripti o ns ........................................................................................................ .......................................................... 6 6.1. 12 t y pes of d ri ving c onfig ura t ions ............................................................................................................................... ................. 6 6.2. c urrent /v ol t a ge d riv i ng m od e ............................................................................................................................... ......................... 6 6.3. r ela t ionshi p be t w een t h e d ispla y d at a a n d d riv e r o ut put pin s .................................................................................................. 6 6.4. b right n ess c on t r ol ............................................................................................................................... ........................................... 7 6.5. i nt ernal d is cha rge f unct ion ............................................................................................................................... ............................ 8 7. electri c a l s pecific a t i o ns ...................................................................................................... ......................................................... 9 7.1. a bsolut e m axi m u m r a t ings ............................................................................................................................... ................................ 9 7.2. r eco mmende d o per a t ing c o ndi ti o n s ............................................................................................................................... ................ 9 7.3. dc c ha ract eri s t i cs ............................................................................................................................... ............................................ 9 7.4. ac c hara ct eris t i c ............................................................................................................................... .............................................1 1 8. a p p l ic a t i o n circui t ............................................................................................................ ............................................................... 12 9. p a c k a g e/p a d loc a t i ons .......................................................................................................... ......................................................... 13 9.1. pa d a ssign men t ............................................................................................................................... ................................................ 13 9.2. o rde ring i nfor m a t ion ............................................................................................................................... ...................................... 13 9.3. pa d l oca t ions ............................................................................................................................... ................................................... 14 10. discl a i m e r ..................................................................................................................... ........................................................................ 16 11 . revision h i st or y ............................................................................................................... .................................................................. 17 ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 2 jun. 29, 2001 v e rsion: 1.0
spod80a 80-cha nnels dot ma trix column/row oled driver 1. gener a l d escription the spod8 0a, an 80-channels dot matrix column/ro w ole d driver , is fabricated b y lo w po w e r cm os technolog y . b y incorporating an 80-bit shif t register , an 80-bit d a t a latch, and a n 80-bit driver , the spod80a can dr ive const ant current/volt age to 80 column/ro w lines simult aneously according to the selection mode and input dat a. 2. feat ures ! shif t clock fre quenc y : 5.0m hz (max. ) (vd d = 2. 4v - 5.5v) ! serial dat a inp u t ! cur r ent/v olt a g e driving modes are select able w i th cv pin (for column driver onl y ) ! suppl y volt age for oled driver: 9.0v - 16v ! inter nal discharge circuit ! cascade function ! built-in display of f function ! 12 t y pes of dri v ing configurations 3. pa cka ge ! bare chip 4. blo c k dia g r a m 80-bits shift regis t er 80-b i ts l a tch l e v e l s h i fter dr iver x 80 (column / row ) o1 o 8 0 re f e re nc e ge n e r a to r ..... ..... ..... floati n g & dis c harge co ntrol l er ld vl ed v ss2 bt v bt r rb 1 di s 2 di s 3 di s 4 flt di o 2 r mo d e 1 cv dis p of f mo d e 2 di o 2 c dio 1 r l/ r cp co l / ro w vd d vss dio 1 c ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 3 jun. 29, 2001 v e rsion: 1.0
spod80a 5. signal descriptio ns mnem o n i c p i n n o . t y p e descripti o n o17 - o1 o40 - o18 o63 - o61 o80 - o64 1 - 17 80 -102 55 - 77 32 - 48 o c o l u m n / r o w out p u t cp 24 i dat a shif t clock. the dat a is shif t ed to 80 bit s shif t register at the falling edge of ?cp? w hen used as column driver . ld 23 i dat a load pulse. when used as a column driver , a row of disp la y dat a is latched at the falling edge of ?ld?. when used as a ro w driver , ?ld? is the shif t clock in put. dio1c dio2c dio1r dio2r 25 19 26 20 i/o series dat a input /output of column /ro w driver . 1). when ?l/r? = 1, ?dio1c? and ?dio1r? are serie s dat a input s of column driver and row d r iver respectively . ?di o 2c? and ?dio2 r ? are series dat a output s of column driver and ro w d r iver respectively . 2). when ?l/r? = 0, ?dio2c? and ?dio2r? are serie s dat a input s of column driver and row d r iver respectively . ?di o 1c? and ?dio1 r ? are series dat a output s of column driver and ro w d r iver respectively . 3). when ?mod e1? ?mode2? = 0, ?col/r ow? = 1, spod80a is used as dedicat ed colum n driver , series dat a input of ro w dr iver , ?dio1r? o r ? d io2r? dependi ng on ?l/r?, sho u ld be connected to vss or float. 4). when ?mode 1 ? ?mode2? = 0, ?col/r ow? = 0, spod80a is use d as dedicated r o w driver , series dat a input of column driver , ?dio 1c? or ? d io2c? depe nding on ?l/r?, should be connected to vss or float. col/r o w 51 i column driver/r ow driver selection vdd 27 - pow e r suppl y of digit a l circu i t vss 18 - g nd o f digit a l circuit v l e d 5 4 79 108 - pow e r suppl y of oled d r iving buf fer v s s 2 4 9 78 103 - gnd o f ole d dr iving buf fer l/r 50 i selection of dat a shif t direction mode1 mode2 53 52 i mode selection. there ar e 12 modes can be sele cted w h en combine ?mode1?, ?mode2? w i t h ?col/r ow? and ?l/r?. cv 22 i selection of driving method, def a u lt is ?h?. cv = 1, current d r iving mode cv = 0, volt age driving mode this mode selection is valid w hen used as column driver onl y . btv btr 28 29 i i brightness control input. by adjusting an exte rnal volt age (vbt) and resistor (rbt) , t he output current in o[1:8 0 ] can be adjusted, see functi on description. this adjustment is valid w h e n used as column driver and cv = 1 onl y . r b 1 3 1 - internal/external r e s i s t o r selection . connect this pin to ground while using internal resi stor , or float it w h en using exter nal resistor ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 4 jun. 29, 2001 v e rsion: 1.0
spod80a mnem o n i c p i n n o . t y p e descripti o n dis2 dis3 dis4 106 105 104 i pulse w i d t h contr o l of internal discharge b y setting dis2 - dis4, the pulse w i d t h of internal discharge can be set to be 0, 2, 4, 6, 8, 10 , 12, 14 twcp . w here dis4 is ms b; dis2 is lsb. the default value of dis4, 3, 2 is 0 10. fl t 107 i output volt age c ontrol. while set to ?h?, t he driver w ill be float w h en input d a t a is ?0?. while set to ?l ?, t he driver output s deselect level (v ss2) w hen input dat a is ?0?. this mode selection is valid only w h en used as column driver . the default value is ?h?. dispof f 21 i control for outpu t deselect level 1). while set to ?l ?, the driver outp u t s deselect level (vss2). 2). while set to ?h?, the driver out put s const ant cur r ent/volt age dep ending on mode selection. v b s 3 0 - b y p a s s cap a c i t o r a 0 . 1 f cap a cito r connecting to vss2 is necessar y ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 5 jun. 29, 2001 v e rsion: 1.0
spod80a 6. fu nctio n a l desc riptions 6 . 1 . 1 2 t y pes of dri v ing config ura t ions col / r o w m o d e 1 m o d e 2 l / r o[1 : 1 6 ] o[17 : 3 2 ] o[33 : 4 8 ] o [ 4 9 : 6 4 ] o [ 6 5 : 8 0 ] 1 0 / 1 0 / 1 1 c o l c o l c o l c o l c o l 1 0 / 1 0 / 1 0 c o l c o l c o l c o l c o l 1 0 1 1 c o l c o l c o l c o l r o w 1 0 1 0 r o w c o l c o l c o l c o l 1 1 0 1 c o l c o l c o l r o w r o w 1 1 0 0 r o w r o w c o l c o l c o l 0 1 0 1 c o l c o l r o w r o w r o w 0 1 0 0 r o w r o w r o w c o l c o l 0 0 1 1 c o l r o w r o w r o w r o w 0 0 1 0 r o w r o w r o w r o w c o l 0 0 / 1 0 / 1 1 r o w r o w r o w r o w r o w 0 0 / 1 0 / 1 0 r o w r o w r o w r o w r o w note: w hen ?mo d e 1 ? ?mode2? = 0, s p od80a is u s ed as dedi cated column driv er or row driv er . w hen ?mode1? ?m ode2? = 1 , s p od80 a i s use d a s col u mn/row driv er . 6 . 2 . curre nt/v olt a ge dri v ing mode spod80a provides tw o kinds of driving methods, current driving and volt age driving. b y setting c v = ?h?, output s programm ed to be column d r iver w ill source a co nst ant current w hen input dat a is ?h? ; and w ill be high impedance or deselect level (vss2) when input dat a is ?l ?. b y setting cv = ?l ?, output s pr ogr ammed to be c o lum n dr iv er will output s e lec t l e v e l ( v led) when i npu t dat a is ?h? ; and will be hi gh impe da nce o r de select level (vss 2) whe n in pu t da t a is ?l ? . 6 . 3 . re la tions hip be t w e e n t h e dis p la y da t a a nd dri v er outp ut pins 6.3.1. co lu mn d r i v e r col / r o w 1 1 1 1 1 1 0 0 0 0 mode1 0 / 1 0 / 1 0 0 1 1 1 1 0 0 mode2 0 / 1 0 / 1 1 1 0 0 0 0 1 1 l/r 1 0 1 0 1 0 1 0 1 0 dat a i n d i o 1 c d i o 2 c d i o 1 c dio2c d io1c dio2c d io1c d i o 2 c d i o 1 c d io2c dat a ou t d i o 2 c d i o 1 c d i o 2 c dio1c d io2c dio1c d io2c d i o 1 c d i o 2 c d io1c 1st o [ 8 0 ] o [ 1 ] o [ 6 4 ] o [ 1 7 ] o [ 4 8 ] o [ 3 3 ] o [ 3 2 ] o [ 4 9 ] o [ 1 6 ] o[65] | | | | | | | | | | | 16th o [ 6 5 ] o [ 1 6 ] o [ 4 9 ] o [ 3 2 ] o [ 3 3 ] o [ 4 8 ] o [ 1 7 ] o [ 6 4 ] o [ 1 ] o[80] 17th o [ 6 4 ] o [ 1 7 ] o [ 4 8 ] o [ 3 3 ] o [ 3 2 ] o [ 4 9 ] o [ 1 6 ] o [ 6 5 ] n a n a | | | | | | | | | na na 32nd o [ 4 9 ] o [ 3 2 ] o [ 3 3 ] o [ 4 8 ] o [ 1 7 ] o [ 6 4 ] o [ 1 ] o [ 8 0 ] n a n a 33rd o [ 4 8 ] o [ 3 3 ] o [ 3 2 ] o [ 4 9 ] o [ 1 6 ] o [ 6 5 ] n a n a n a n a | | | | | | | na na na na figure of clock 48th o [ 3 3 ] o [ 4 8 ] o [ 1 7 ] o [ 6 4 ] o [ 1 ] o [ 8 0 ] n a n a n a n a 49th o [ 3 2 ] o [ 4 9 ] o [ 1 6 ] o [ 6 5 ] n a n a n a n a n a n a | | | | | n a n a n a n a n a n a 64th o [ 1 7 ] o [ 6 4 ] o [ 1 ] o [ 8 0 ] n a n a n a n a n a n a 65th o [ 1 6 ] o [ 6 5 ] n a n a n a n a n a n a n a n a | | | n a n a n a n a n a n a n a n a figure of clock 80th o [ 1 ] o [ 8 0 ] n a n a n a n a n a n a n a n a ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 6 jun. 29, 2001 v e rsion: 1.0
spod80a 6.3.2. ro w d r i v er col / r o w 0 0 0 0 0 0 1 1 1 1 mode1 0 / 1 0 / 1 0 0 1 1 1 1 0 0 mode2 0 / 1 0 / 1 1 1 0 0 0 0 1 1 l/r 1 0 1 0 1 0 1 0 1 0 dat a i n d i o 1 r d i o 2 r d i o 1 r d i o 2 r d io1r dio2r d io1r d i o 2 r dio1r d io2r dat a ou t d i o 2 r d i o 1 r d i o 2 r d i o 1 r d io2r dio1r d io2r d i o 1 r dio2r d io1r 1st o [ 1 ] o [ 8 0 ] o [ 1 7 ] o [ 6 4 ] o [ 3 3 ] o [ 4 8 ] o [ 4 9 ] o [ 3 2 ] o [ 6 5 ] o [ 1 6 ] | | | | | | | | | | | 16th o [ 1 6 ] o [ 6 5 ] o [ 3 2 ] o [ 4 9 ] o [ 4 8 ] o [ 3 3 ] o [ 6 4 ] o [ 1 7 ] o [ 8 0 ] o [ 1 ] 17th o [ 1 7 ] o [ 6 4 ] o [ 3 3 ] o [ 4 8 ] o [ 4 9 ] o [ 3 2 ] o [ 6 5 ] o [ 1 6 ] n a n a | | | | | | | | | na na 32nd o [ 3 2 ] o [ 4 9 ] o [ 4 8 ] o [ 3 3 ] o [ 6 4 ] o [ 1 7 ] o [ 8 0 ] o [ 1 ] n a n a 33rd o [ 3 3 ] o [ 4 8 ] o [ 4 9 ] o [ 3 2 ] o [ 6 5 ] o [ 1 6 ] n a n a n a n a | | | | | | | na na na na 48th o [ 4 8 ] o [ 3 3 ] o [ 6 4 ] o [ 1 7 ] o [ 8 0 ] o [ 1 ] n a n a n a n a 49th o [ 4 9 ] o [ 3 2 ] o [ 6 5 ] o [ 1 6 ] n a n a n a n a n a n a | | | | | n a n a n a n a n a n a 64th o [ 6 4 ] o [ 1 7 ] o [ 8 0 ] o [ 1 ] n a n a n a n a n a n a 65th o [ 6 5 ] o [ 1 6 ] n a n a n a n a n a n a n a n a | | | n a n a n a n a n a n a n a n a figure of clock 80th o [ 8 0 ] o [ 1 ] n a n a n a n a n a n a n a n a 6.4. brig h t n ess co n t ro l 6.4.1. usin g in tern al resisto r 6.4.2. usin g extern a l resisto r v bt bt v rb 1 bt r i ch = vbt /2 0k o per ati on condi ti on v bt = 1 ~ 5 v i ch 25 0 50 15 v bt v bt bt v rb1 b t r i ch = vbt /r ex t re x t ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 7 jun. 29, 2001 v e rsion: 1.0
spod80a 6 . 5 . inte rna l dis c h a r ge func tion spod80a supp ort s internal di scharge function. an internal discharge pulse w ill be active at the rising edge of ?ld?, and be inactive at the f a lling edge of ? c p?, the du ratio n of the internal discharge pulse is programmable . b y setting dis2 - dis4, user can set discharg e pulse w i d t h to be 0, 2, 4, 6, 8, 10, 12, 14 t wc p , period of shif t clock cp . the def ault value of dis 4 - dis2 is 010, w h ere dis2 is lsb; dis4 is ms b. this function is only valid w h e n used as column driver . ld cp di s row n row n+ 1 123 4 1 4 1 ... ... t wc p ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 8 jun. 29, 2001 v e rsion: 1.0
spod80a 7. electri c al specifications 7.1. a b so lu te maxi mu m ratin g s p a r a m e t e r s y m b o l r a t i n g u n i t suppl y volt age ( logic) vdd -0.5 ~ 7.0 v suppl y volt age ( d riving buf fer) v led -0.5 ~ 18.0 v input volt age ran ge v in -0.5 ~ vdd+0.5 v output volt age ra nge v out -0.5 ~ vdd+0.5 v s t orage temper a t ure t st g -45.0 to 12 5.0 note: s t resses bey ond tho s e giv en in th e a b so lute max i mum rating t a ble may cause oper ati onal e rror s or damage to the dev ice . for no rmal opera t ional condi tion s see ac /dc electri c al char acteristi c s. 7 . 2 . re c o mme nde d ope r a t ing condit i ons p a r a m e t e r s y m b o l m i n . t y p . m a x . u n i t suppl y volt age ( logic) vdd 2.4 - 5.5 v suppl y volt age ( d riving buf fer) vled 9.0 - 16.0 v oper ating tempe r ature t op r - 2 0 . 0 - 7 0 . 0 7.3. dc ch ara c teri stics 7.3.1. co lu mn mo d e (vss = vss2 = 0v vdd = 2.4v - 5.5v ; vled = 16.0v ; t op r = -20 ~ 70 ) p a r a m e t e r s y m b o l con d iti o n s a p p lic a b l e pin m i n . t y p . max. unit v ih vdd = 3.3v 2.0 - - v input volt age v il vdd = 3.3v dio1c , l/r, di o2c, cp , dio1r , cv , di o2r, ld, mode1, fl t , m o de2, col/r o w , dis2 , dis3, dis4, dispo ff - - 0 . 8 v v oh1 i oh = -0.2ma vdd-0.2 - - v output volt age (1 ) v ol 1 i ol = 0.2ma dio1c , di o2c, dio1r , dio2r - - 0 . 2 v i hil1 v in = vdd - - 1.0 a input leakage cur r ent (1 ) i lil1 v in = vss l/r, cp , ld, c o l/row , mode1, m o de2 , dispof f - 1 . 0 - - a i hil2 v in = vdd - - 1.0 a input leakage cur r ent (2 ) i lil2 v in = vss cv , dis3, fl t - 4 0 - - a i hil3 v in = vdd - - 40 a input leakage cur r ent (3 ) i lil3 v in = vss dis2, dis4 - 1 . 0 - - a i hiol v in = vdd - - 2.0 a i/o leakage curr e n t i lio l v in = vss dio1c , di o2c, dio1r , dio2r - 2 . 0 - - a column on outp u t current i ch v bt v = 5.0v , cv = ?h? -200 -250 -300 a column off out put current i cl cv = ?h?, f l t = ?h? *1 - 1 . 0 - - a column on o u tp ut volt age v ch cv = ?l ?, i ch = -0.2ma vled-0.3v - - v column off out put volt age v cl cv = ?l ?, i cl = 0.2ma *1 - - 0 . 3 v i cvdd v d d - - 1 . 0 ma suppl y curren t i cvl e d *2 v l e d - - 200 a i coff1 v d d - - 1 . 0 ma display o f f cur r ent i coff2 *3 v l e d - - 1 . 0 a ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 9 jun. 29, 2001 v e rsion: 1.0
spod80a 7.3.2. ro w m o d e (vss = vss2 = 0v vdd = 2.4v - 5.5v ; vled = 16.0v ; t op r = -20 ~ 70 ) p a r a m e t e r s y m b o l con d iti o n s a p p lic a b l e pin m i n . t y p . max. unit v ih vdd = 3.3v 2.0 - - v input volt age v il vdd = 3.3v dio1c , l/r, di o2c, cp , dio1r , cv , di o2r, ld, mode1, fl t , m o de2, col/r o w , dis2 , dis3, dis4, dispo ff - - 0 . 8 v v oh i oh = -0.2ma vdd-0.2 - - v output volt age v ol i ol = 0.2ma dio1c , di o2c, dio1r , dio2r , - - 0 . 2 v i hil1 v in = vdd - - 1.0 a input leakage cur r ent i lil1 v in = vss l/r, cp , ld, c o l/row , mode1, m o de2 , dispof f - 1 . 0 - - a i hil2 v in = vdd - - 1.0 a input leakage cur r ent (2 ) i lil2 v in = vss cv , dis3, fl t - 4 0 - - a i hil3 v in = vdd - - 40 a input leakage cur r ent (3 ) i lil3 v in = vss dis2, dis4 - 1 . 0 - - a i hiol v in = vdd - - 2.0 a i/o leakage curr e n t i lio l v in = vss dio1c , di o2c, dio1r , di o2r - 2 . 0 - - a ro w off output volt age v rh i rh = -0.2ma vled-0.3 - - v ro w on output v o lt age v rl i rl = 48ma (*5) *4 - - 1.92 v i rv d d v d d - - 1 . 0 m a suppl y curren t i rv l e d *2 v l e d - - 1 5 0 a i roff1 v d d - - 1 . 0 m a display o f f cur r ent i roff2 *3 v l e d - - 1 . 0 a note* 1 : depending on the selected mo de, the applica b le pins w ill be col/ r o w m o d e 1 m o d e 2 l/ r a p pl i cabl e pi n s 1 0 / 1 0 / 1 1 o[1 : 8 0 ] 1 0 / 1 0 / 1 0 o[1 : 8 0 ] 1 0 1 1 o[1 : 6 4 ] 1 0 1 0 o[17 :80 ] 1 1 0 1 o[1 : 4 8 ] 1 1 0 0 o[33 :80 ] 0 1 0 1 o[1 : 3 2 ] 0 1 0 0 o[49 :80 ] 0 0 1 1 o[1 : 1 6 ] 0 0 1 0 o[65 :80 ] note* 2 : vdd = 3. 0v , f cp = 2 . 08mhz, f ld =12.8kh z , no lo ad. the inpu t da t a is turne d ov er by c p . note* 3 : vdd = 3. 0v , f cp = 5 . 0mhz, n o load. the inpu t d a t a is turn ed ov er by c p . d i spof f s e t to ?l ? . note* 4 : depending on the sele cted mo de, the appli c ab le p i ns w ill be col/ row m o d e 1 m o d e 2 l/ r a p pl i cabl e pi ns 1 0 1 1 o[65 :80 ] 1 0 1 0 o[1 : 1 6 ] 1 1 0 1 o[49 :80 ] 1 1 0 0 o[1 : 3 2 ] 0 1 0 1 o[33 :80 ] 0 1 0 0 o[1 : 4 8 ] 0 0 1 1 o[17 :80 ] 0 0 1 0 o[1 : 6 4 ] 0 0 / 1 0 / 1 1 o[1 : 8 0 ] 0 0 / 1 0 / 1 0 o[1 : 8 0 ] note* 5 : be cau s e o f the row driv ing cap ability of spod8 0a, the max i mum column l i ne s that spod80a ca n driv e are 1 60. that is, there are only 2 spod80as can ca scade a s column d r iv ers w h en usi n g spod80a a s r o w driv er . ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 10 jun. 29, 2001 v e rsion: 1.0
spod80a 7.4. a c ch ara c teri stic (vss = vss2 = 0v ; vdd = 2.4v - 5.5v ; vled = 1 6 .0v ; t op r = -20 ~ 70 ) p a r a m e t e r s y m b o l con d iti o n m i n . t y p . m a x . u n i t shif t clock per iod t wc p 2 0 0 - - n s dat a latch in setup time t ds 4 0 - - n s dat a latch in hold time t dh 4 0 - - n s cp low to l d high t cllh 2 0 - - n s ld low to cp lo w t llc l 2 0 - - n s ld ?h? pulse w i d t h t wl d 1 0 0 - - n s ld low to ro w o u tput t lro w load = 0.6nf - - 9.0 s ld high to column output t lco l * 6 - - - ns output d e la y tim e t ddo c l = 15pf 40 - 100 ns cp ld di o1 / di o 2 o [ 1:80] ro w o [ 1:80] col u m n t wc p t dh t ds t cllh t wl d t lr o w t lc o l cp di t dh t dh t dd o do t llcl d i s c harge x note* 6 : depending on loading , plea se refer to dc chara cteristics. ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 1 1 jun. 29, 2001 v e rsion: 1.0
spod80a 8. applic atio n cir c u it s p l 512a / spl 130a o l ed panel 160x160 dio1r dio2r ld cp cv l/r col / row mode1/ 2 o1 dis p of f o80 bt v bt r rb1 fp lp cp di p/dl3 . . . . . . . . . vdd vdd vdd vled . . . lcdenp/lcden di o 1 r di o 2 r ld cp cv l/r col/ row mode1/ 2 d isp o ff bt v bt r rb1 dio1 c d io2 c ld cp cv l/r col / row mode 1/2 o1 dis p o f f o8 0 btv bt r rb1 dio1 c d io2 c ld cp cv l/r co l / r o w mode 1/2 o1 dis p o f f o8 0 btv bt r rb1 sp o d 8 0 a vb s vb s vb s vb s 0. 1 f spo d80a sp o d 80a sp o d 80a 0.1 f vd d 0. 1 f0 . f 1 ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 12 jun. 29, 2001 v e rsion: 1.0
spod80a 9. pa cka ge/pa d loca tion s 9.1. p a d a s sig n m en t 21 v ss2 l/ r co l / r o w mo d e 2 mo d e 1 vl ed 49 50 51 52 53 54 vle d fl t di s 2 di s 3 di s 4 vss2 rb 1 vb s bt r bt v vd d 1 di o 1 r di o 1 c cp ld di s p o f f di o 2 r di o 2 c vs s1 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 o64 o65 o66 o67 o68 o69 o70 o71 o72 o73 o74 o75 o76 o77 o78 o79 o80 vl e d vs s2 o41 o42 o43 o57 o58 o59 o60 o61 o62 o63 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 76 75 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 o36 o37 o38 o39 o40 o35 o34 o33 o32 o31 o30 o29 o28 o27 o26 o25 o24 o23 o22 o21 o20 o19 o18 o44 o45 o46 o47 o48 o49 o50 o51 o52 o53 o54 o55 o56 10 8 10 7 10 6 10 5 10 4 10 3 74 77 x y (0 , 0 ) cv chip size: 7960 m x 1470 m p a d size: 100 m x 100 m this ic substrate should be connected to vss note1: chip si ze in cluded scri be l i ne. note2: t o ensur e that the ic fu nction properly , bond all v dd and vs s pi ns. note3: the 0.1 f cap a citor b e tw een v dd and vs s shoul d be pla c ed to ic a s clo s e as po ssible . 9 . 2 . orde ring i n for m a t ion produc t nu mb e r package t y pe spod80a- nnnn v - c c h i p f o r m note1: code numb e r (nnn nv) is a ssi g ned for cu stomer . note2: code numb e r (nnn n = 0000 - 9 999); v e rsion ( v = a - z) . ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 13 jun. 29, 2001 v e rsion: 1.0
spod80a 9.3. p a d l o catio n s pa d n o . pa d n a m e x y pa d n o . pa d n a m e x y 1 o 1 7 3 3 2 9 5 9 8 4 5 o 6 7 - 2 8 7 1 5 9 8 2 o 1 6 3 1 6 9 5 9 8 4 6 o 6 6 - 3 0 2 1 5 9 8 3 o 1 5 3 0 1 9 5 9 8 4 7 o 6 5 - 3 1 7 1 5 9 8 4 o 1 4 2 8 6 9 5 9 8 4 8 o 6 4 - 3 3 3 1 5 9 8 5 o 1 3 2 7 2 9 5 9 8 4 9 v s s 2 - 3 8 3 3 5 8 6 6 o 1 2 2 5 8 9 5 9 8 5 0 l / r - 3 8 3 3 3 8 3 7 o 1 1 2 4 4 9 5 9 8 5 1 col/r o w - 3 8 3 3 1 2 7 8 o 1 0 2 3 0 9 5 9 8 5 2 m o d e 2 - 3 8 3 3 - 1 2 8 9 o 9 2 1 6 9 5 9 8 5 3 m o d e 1 - 3 8 3 3 - 3 8 4 1 0 o 8 2 0 2 9 5 9 8 5 4 v l e d - 3 8 3 3 - 5 8 8 1 1 o 7 1 8 8 9 5 9 8 5 5 o 6 3 - 3 3 3 1 - 6 0 0 1 2 o 6 1 7 4 9 5 9 8 5 6 o 6 2 - 3 1 7 1 - 6 0 0 1 3 o 5 1 6 0 9 5 9 8 5 7 o 6 1 - 3 0 2 1 - 6 0 0 1 4 o 4 1 4 6 9 5 9 8 5 8 o 6 0 - 2 8 7 1 - 6 0 0 1 5 o 3 1 3 2 9 5 9 8 5 9 o 5 9 - 2 7 3 1 - 6 0 0 1 6 o 2 1 1 8 9 5 9 8 6 0 o 5 8 - 2 5 9 1 - 6 0 0 1 7 o 1 1 0 4 9 5 9 8 6 1 o 5 7 - 2 4 5 1 - 6 0 0 1 8 v s s 1 9 0 9 5 9 8 6 2 o 5 6 -231 1 - 6 0 0 1 9 d i o 2 c 7 6 9 5 9 8 6 3 o 5 5 - 2 1 7 1 - 6 0 0 2 0 d i o 2 r 6 2 9 5 9 8 6 4 o 5 4 - 2 0 3 1 - 6 0 0 2 1 d i s p o f f 4 8 9 5 9 8 6 5 o 5 3 - 1 8 9 1 - 6 0 0 2 2 c v 3 4 9 5 9 8 6 6 o 5 2 - 1 7 5 1 - 6 0 0 2 3 l d 2 0 9 5 9 8 6 7 o 5 1 -161 1 - 6 0 0 2 4 c p 6 9 5 9 8 6 8 o 5 0 - 1 4 7 1 - 6 0 0 2 5 d i o 1 c - 7 1 5 9 8 6 9 o 4 9 - 1 3 3 1 - 6 0 0 2 6 d i o 1 r -21 1 5 9 8 7 0 o 4 8 -1 1 9 1 - 6 0 0 2 7 v d d 1 - 3 5 1 5 9 8 7 1 o 4 7 - 1 0 5 1 - 6 0 0 2 8 b t v - 4 9 1 5 9 8 7 2 o 4 6 -91 1 - 6 0 0 2 9 b t r - 6 3 1 5 9 8 7 3 o 4 5 - 7 7 1 - 6 0 0 3 0 v b s - 7 7 1 5 9 8 7 4 o 4 4 - 6 3 1 - 6 0 0 3 1 r b 1 -91 1 5 9 8 7 5 o 4 3 - 4 9 1 - 6 0 0 3 2 o 8 0 - 1 0 5 1 5 9 8 7 6 o 4 2 - 3 5 1 - 6 0 0 3 3 o 7 9 -1 1 9 1 5 9 8 7 7 o 4 1 -21 1 - 6 0 0 3 4 o 7 8 - 1 3 3 1 5 9 8 7 8 v s s 2 - 7 1 - 6 0 0 3 5 o 7 7 - 1 4 7 1 5 9 8 7 9 v l e d 6 9 - 6 0 0 3 6 o 7 6 -161 1 5 9 8 8 0 o 4 0 2 0 9 - 6 0 0 3 7 o 7 5 - 1 7 5 1 5 9 8 8 1 o 3 9 3 4 9 - 6 0 0 3 8 o 7 4 - 1 8 9 1 5 9 8 8 2 o 3 8 4 8 9 - 6 0 0 3 9 o 7 3 - 2 0 3 1 5 9 8 8 3 o 3 7 6 2 9 - 6 0 0 4 0 o 7 2 - 2 1 7 1 5 9 8 8 4 o 3 6 7 6 9 - 6 0 0 4 1 o 7 1 -231 1 5 9 8 8 5 o 3 5 9 0 9 - 6 0 0 4 2 o 7 0 - 2 4 5 1 5 9 8 8 6 o 3 4 1 0 4 9 - 6 0 0 4 3 o 6 9 - 2 5 9 1 5 9 8 8 7 o 3 3 1 1 8 9 - 6 0 0 4 4 o 6 8 - 2 7 3 1 5 9 8 8 8 o 3 2 1 3 2 9 - 6 0 0 ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 14 jun. 29, 2001 v e rsion: 1.0
spod80a pa d n o . pa d n a m e x y pa d n o . pa d n a m e x y 8 9 o 3 1 1 4 6 9 - 6 0 0 9 9 o 2 1 2 8 6 9 - 6 0 0 9 0 o 3 0 1 6 0 9 - 6 0 0 1 0 0 o 2 0 3 0 1 9 - 6 0 0 9 1 o 2 9 1 7 4 9 - 6 0 0 1 0 1 o 1 9 3 1 6 9 - 6 0 0 9 2 o 2 8 1 8 8 9 - 6 0 0 1 0 2 o 1 8 3 3 2 9 - 6 0 0 9 3 o 2 7 2 0 2 9 - 6 0 0 1 0 3 v s s 2 3 8 3 2 - 5 8 8 9 4 o 2 6 2 1 6 9 - 6 0 0 1 0 4 d i s 4 3 8 3 2 - 3 8 4 9 5 o 2 5 2 3 0 9 - 6 0 0 1 0 5 d i s 3 3 8 3 2 - 1 2 8 9 6 o 2 4 2 4 4 9 - 6 0 0 1 0 6 d i s 2 3 8 3 2 1 2 7 9 7 o 2 3 2 5 8 9 - 6 0 0 1 0 7 fl t 3 8 3 2 3 8 3 9 8 o 2 2 2 7 2 9 - 6 0 0 1 0 8 v l e d 3 8 3 2 5 8 6 ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 15 jun. 29, 2001 v e rsion: 1.0
spod80a 10. disclaimer the information appearing in this public ation is believed to be accur a te. integrated circuit s sold b y sun p lus t e chnology ar e covered b y th e w a rran t y and p a t ent indemnifi cation provisions stipulated in the terms of sale only . sun p lus makes no w a rra nt y , exp r e ss, st atutor y imp lied or b y descri p tion regarding t he information in this publicati on o r regarding the f r eedom of the d e scribed chip(s) from p a tent infringement. fur t herm ore, s unplus makes no w a rran t y of merchan t ability or fitness for an y p urpose. sun p lus reserves the right to halt p r oduction or alter the specif ication s and prices at an y time w i tho u t noti c e. accordingly , the reade r is cautioned to ver i fy t hat the da t a sheet s and oth e r information i n t h is publication are current befor e placing orders. product s descr ibed herein are intended for use in normal co mmercial application s. applications inv o lving unusual e n vironment al or reliability require ment s, e.g. milit ary equipment o r medical l i fe su pport equip ment , ar e specifica lly not r e commended w i thout additional processing b y s unp lus fo r such applications. please note that application cir c uit s illustr a ted in this document ar e for r e fer ence pur p oses only . ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 16 jun. 29, 2001 v e rsion: 1.0
spod80a 11. revision hi story d a t e r e v i sio n # descripti o n page apr. 30, 2001 0.1 original 11 jun. 29, 2001 1.0 1. delete ? preli m ina r y ? 2. corr ect p a ck age description in the ? 3. p a cka g e ? 3. cor r ect chip si ze 4. add note1 to note3 in the ? 9 . 1 p a d assignm ent ? 5. rene w to a ne w d o cument form at 1 13 13 ? sunplus t e chnolog y co., l t d. propriet a r y & c o nfidential 17 jun. 29, 2001 v e rsion: 1.0

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